Contents
Part I High-Speed Clock and Data Recovery
Fundamental Stochastic Jitter Processes Associated with Clock
and Data Recovery: A Tutorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Anthony Fraser Sanders
Clock Recovery and Equalization Techniques for Lossy Channels
in Multi Gb/s Serial Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
M. Pozzoni, S. Erba, P. Viola, M. Pisati, E. Depaoli, D. Sanzogni, R. Brama,
D. Baldi, M. Repossi and F. Svelto
Top-Down Bottom-Up Design Methodology for Fast and Reliable Serdes
Developments in nm Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Jan Crols
Mixed-Signal Implementation Strategies for High Performance Clock
and Data Recovery Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Michael H. Perrott
Jointly Optimize Equalizer and CDR for Multi-Gigabit/s SerDes . . . . . . . . 63
Song Wu and Robert Payne
Time to Digital Conversion: An Alternative View on Synchronization . . . . 77
J. Daniels, W. Dehaene and M. Steyaert
Part II High-Performance Amplifiers
Dynamic Offset Cancellation in Operational Amplifiers and
Instrumentation Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Johan H. Huijsing
Current Sense Amplifiers with Extended Common Mode Voltage Range . . 125
W.J. Kindt
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viii Contents
Low-Voltage Power-Efficient Amplifiers for Emerging Applications . . . . . . 147
A. L´opez-Martin, R.G. Carvajal, E. L´opez-Morillo, L. Acosta,
T. S´anchez-Rodriguez, C. Rubia-Marcos and J. Ram´ırez-Angulo
Integrated Amplifier Architectures for Efficient Coupling to the Nervous
System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Timothy Denison, Gregory Molnar and Reid R. Harrison
Transimpedance Amplifiers for Extremely High Sensitivity Impedance
Measurements on Nanodevices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
Giorgio Ferrari, Fabio Gozzini and Marco Sampietro
Design of High Power Class-D Audio Amplifiers . . . . . . . . . . . . . . . . . . . . . . . 209
Marco Berkhout
Part III Power Management
Single-Inductor Multiple-Output Dc-Dc Converters . . . . . . . . . . . . . . . . . . . . 233
Massimiliano Belloni, Edoardo Bonizzoni and Franco Maloberti
Enhanced Ripple Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255
Richard Redl
Robust DCDC Converter for Automotive Applications . . . . . . . . . . . . . . . . . . 269
Ivan Koudar
Highly Integrated Power Managemant Integrated Circuits in Advanced
Cmos Process Technologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303
Mario Manninger
Wideband Efficient Amplifiers for On-Chip Adaptive Power
Management Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
L´azaro Marco, Vahid Yousefzadeh, Albert Garc´ıa-Tormo, Alberto Poveda,
Dragan Maksimovi´c and Eduard Alarc´on
Design Methodology and Circuit Techniques for Any-Load Stable LDOs
with Instant Load Regulation and Low Noise . . . . . . . . . . . . . . . . . . . . . . . . . . 339
Vadim Ivanov
Analog Circuit Design - High-speed Clock and Data Recovery,High-performance Ampl.rar
