Phase-Locked Loop Synthesizer Simulation: Phase-Locked Loop Synthesizer Simulation.part1.rar

Phase-Locked Loop Synthesizer Simulation (McGraw-Hill Electronic Engineering) (Hardcover)
by Giovanni Bianchi (Author)




Hardcover: 227 pages Publisher: McGraw-Hill Professional; 1 edition (March 9, 2005) Language: English ISBN-10: 0071453717 ISBN-13: 978-0071453714


Product Description
Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessary for radio & wireless. This book describes how to calculate PLL performances by using standard mathematical or circuit analysis programs. Theoretical descriptions are limited to the minimum needed to explain how to perform calculations. Although presented methods of analysis can be implemented with many commercial programs, their description always refers to Mathcad and SIMetrix.

From the Back Cover
CD-ROM with analyses in MATHCAD and SIMETRIX
A COMPLETE TOOLKIT FOR PLL SYNTHESIZER DESIGN This book/CD-ROM package provides the analysis and algorithms necessary to perform sophisticated PLL calculations and simulation exercises required for today’s advanced communications equipment. Delivering all the tools readers need to begin solving their own design challenges immediately, Phase-Locked Loop Synthesizer Simulation offers:

• Everything necessary to calculate PLL performances with standard mathematical or circuit analysis programs
• A CD with all the book's analyses in MATHCAD and SIMETRIX, with user-variable parameters and configurations
• Minimal theoretical discussion -- only what's needed to explain how to perform calculations
• Open-loop, closed-loop, and phase error response calculations
• Noise definition and response algorithms
• Discussion of direct digital synthesizer
• Methods of analysis that can be implemented with any commercial program, though description always refers to MATHCAD and SIMETRIX

THE DATA NEEDED TO GENERATE PLL SOLUTIONS
PLL working principles * Laplace and Fourier transforms * Transforms of some important functions * PLL transfer functions * PLL stability analysis * PLL order and PLL type * First-order PLL * Second-order PLL * Loop components * Phase detector * Multiplier as phase detector * Phase frequency detector * Dead zone * PFD spurs * Charge pump * Sampled PLL * Loop filter * Reference spur filtering * Loop filters for voltage output phase detectors * Loop filters for charge pump * Loop filter scaling * VCO * Frequency dividers * Frequency divider phase noise * Fractional-N frequency divider * Single-accumulator fractional divider * Multiple-accumulator fractional dividers * Z transform * First-order ¿--¿ modulator * Higher-order ¿--¿ converters * Synthesizer performance simulation * Simulation techniques * Phase noise of PLL synthesizer * Modulation of the PLL * Modulation of the reference oscillator only * Modulation of the VCO only * Dual-point modulation * Settling time * Lock-in * Pull-in * PLL performance verification * Measurement of PLL frequency response magnitude * Sampling phase detector * Multiple-loop PLL * Phase noise of multiple-loop PLL * Transients in multiple-loop PLL * Variations on double-loop architecture * Direct digital synthesizer * Principle of DDS operation * Effects of nonideal components on DDS performance * Enhancements of DDS architecture

Contents

Preface vii
Chapter 1. Phase-Locked Loop Basics 1
1.1 Introduction 1
1.2 PLL Working Principles 1
1.3 Laplace and Fourier Transforms 3
1.3.1 Definitions 3
1.3.2 Basic properties 3
1.3.3 Transforms of some important functions 4
1.4 PLL Transfer Functions 5
1.4.1 PLL stability analysis 8
1.5 PLL Order and PLL Type 10
1.6 First-Order PLL 11
1.7 Second-Order PLL 12
References 21
Chapter 2. Loop Components 23
2.1 Introduction 23
2.2 Phase Detector 24
2.2.1 Multiplier as phase detector 24
2.2.2 Phase frequency detector 28
2.3 Loop Filter 45
2.3.1 Reference spur filtering 45
2.3.2 Loop filters for voltage output phase detectors 48
2.3.3 Loop filters for charge pump 52
2.3.4 Loop filter scaling 58
2.4 VCO 61
2.4.1 Principle of working 61
2.4.2 VCO analysis 64
2.4.3 Phase noise 74
2.4.4 Pulling and pushing 78
2.5 Reference Sources 79
2.6 Frequency Dividers 81
2.6.1 Frequency divider phase noise 88
References 91
v
For more information about this title, click here
vi Contents
Chapter 3. Fractional-N Frequency Divider 93
3.1 Introduction 93
3.2 Single-Accumulator Fractional Divider 93
3.3 Multiple-Accumulator Fractional Dividers 100
3.3.1 Z transform 101
3.3.2 First-order - modulator 101
3.3.3 Higher-order - converters 104
3.3.4 Multiple-accumulator fractional-N phase noise 110
References 114
Chapter 4. Synthesizer Performance Simulation 117
4.1 Introduction 117
4.2 Simulation Techniques 118
4.3 Phase Noise 126
4.3.1 Definitions 126
4.3.2 Phase noise of PLL synthesizer 128
4.4 Modulation of the PLL 148
4.4.1 Modulation of the reference oscillator only 150
4.4.2 Modulation of the VCO only 151
4.4.3 Dual-point modulation 151
4.5 Settling Time 153
4.5.1 Lock-in 156
4.5.2 Pull-in 167
4.6 Final Note on Circuit-Based Simulation 180
References 180
Chapter 5. Miscellaneous 181
5.1 Introduction 181
5.2 PLL Performance Verification 181
5.2.1 Measurement of PLL frequency response magnitude 186
5.3 Sampling Phase Detector 188
5.4 Multiple-Loop PLL 194
5.4.1 Phase noise of multiple-loop PLL 196
5.4.2 Transients in multiple-loop PLL 198
5.4.3 Variations on double-loop architecture 201
5.5 Direct Digital Synthesizer 202
5.5.1 Principle of DDS operation 203
5.5.2 Effects of nonideal components on DDS performance 207
5.5.3 Enhancements of DDS architecture 218
References 221
Index 223

Phase-Locked Loop Synthesizer Simulation.part2
共2部分

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[ 本帖最后由 drjiachen 于 2008-10-21 22:28 编辑 ]

Phase-Locked Loop Synthesizer Simulation.part1
共2部分

不错，下了看看:11bb :11bb :11bb

:11bb :11bb :11bb :11bb
很好的书，谢谢！

现在在做PLL，很有用啊！！！！！

很好的书，谢谢！很好的书，谢谢！

多谢搂住，学习学习~~~~~~~~~~~~~~

:11bb :11bb :11bb :11bb

下载看看  目前正在学习 锁相环

下载学习，锁相环，好东西哈。~~~~~~~~~~··

现在在做PLL，很有用啊！！！！！

很好的东西 学习一下！
:11bb

:11bb 很好的东西
将来做锁相环呢

很好的东西！！！！！！！！
做锁相环呢

:11bb

这学期我在上这课

好东西，支持~~~~~~~~~~~~~~~~~~

好书啊，收藏了，以后用得着的哦:11bb

好书啊，收藏了，以后用得着的哦:11bb

PLL很有用,可用在PLL LNB, Repeater, PLL Doppler Radar, Microwave Exciter,下載看看,謝謝.

感谢楼主分享，不错。
正在学习这个，下来学习一下！·

谢谢！！！！！！！！！！！！！Q！

:11bb :11bb :11bb

This book is about what?

谢谢！！！！！！！！！！！！！！！！

不错!收藏了:27bb :29bb :29bb :29bb

学习学习，谢谢楼主！！！！:27bb :29bb :30bb

学习，学习中，谢谢分享

很喜欢哦，需要中，谢谢~~~~~

:11bb :27bb :29bb

不错，来看看，^_^
。。。。。

:27bb :27bb :27bb :27bb

谢谢分享，:27bb :29bb :30bb

没怎么上过PLL的课，平时就是直接拿来用，也没考虑优化啥的，呵呵，学习下原理，有助于提高！

感谢楼主爱心分享，赶快下载来看看。

目前正在学习锁相环，谢谢。

:30bb  好东西要认真学习！谢谢楼主!:27bb

好东东呀！。。。。。。。。。。。。。。。。。。。。。。

楼主的这本书还挺新的呀！楼主厉害

:11bb 好书啊，我来学习:27bb

好书，PLL太难了，难得有点好资料！

顶一下，谢谢分享！

Many good books are available on phase-locked loop (PLL) theory. It is

analysis programs.


[ 本帖最后由 ciuan 于 2009-4-28 01:50 编辑 ]

很好的书，谢谢！很好的书，谢谢！

楼住的书我收场了!

楼住的书我收场了!

:27bb 3# drjiachen

真是不错啊
好东西
谢谢楼主分享
谢了

感谢！~~~~~~~~~~~

谢谢楼主的分享

本帖最后由 huangfeihong88 于 2009-10-25 08:30 编辑

:29bb

拿走了！谢谢！

谢谢楼主，哈哈

不错，下了看看

好書~~~
感謝樓主的熱心分享~~~

好书啊，收藏了，以后用得着的哦！！！！

好书，谢谢楼主

pll好书，看看

不错收藏了

谢谢分享:27bb:21bb

很好的书，谢谢！谢谢！

谢谢楼主分享

xie xie lou zhu

看看。。。。。。。。。。。。。。。。。

dddddddddddddddddddd

dddddddddddddddddddd

很需要。。。。非常感谢~·····

谢谢漏壶哈、、、

謝謝大大的分享 這些資料可以幫助我

下来看看，哈哈

不错不错
1
11111

好书，果断收藏之

锁相环仿真是个难点啊，一直不知道怎么能仿准。多谢分享

呵呵呵好好学习天天向上

好资料，好好学习

好资料，谢谢分享

尼玛   回复神马东西像大姨妈一样烦有木有。。。。:24bb

好书 看看谢谢

基本原则  有的

PLL的仿真一直想做的~

感謝分享！{:soso_e102:}

很好的书，谢谢

非常感谢楼主分享！！

{:7_1234:}{:7_1234:}{:7_1234:}

感谢分享

好东西啊

谢谢，很好的书

谢谢~

thanks......

Phase-Locked Loop

谢谢楼主

学习下，是本不错的书

非常感谢！！！！！！！

學習學習:16bb

多谢楼主的分享

学习一下了

ZHENG XU YAO ZHE YANG DE ZI LIAO

谢谢分享

老任，不大地道

gan xie fenxiang

多谢楼主多谢楼主多谢楼主

xiexie

好书，好人品！

看看，找了半天了

感谢分享！

参考下谢谢

参考下谢谢

好东西！！！

来学习一下，正好需要