搜索附件  
头雁微网 附件中心 后勤保障 档案室 Architectures for RF Frequency Synthesizers.Kluwer: Architectures for RF Frequency Synthesizers.Kluwer.part3.rar
板块导航
附件中心&附件聚合2.0
For Discuz! X3.5 © hgcad.com

Architectures for RF Frequency Synthesizers.Kluwer: Architectures for RF Frequency Synthesizers.Kluwer.part3.rar

 

Architectures for RF Frequency Synthesizers.Kluwer:
Architectures for RF Frequency Synthesizers (The Springer International Series in Engineering and Computer Science) (Hardcover)by Cicero S. Vaucher (Author)


Hardcover: 276 pages Publisher: Springer; 1 edition (June 30, 2002) Language: English ISBN-10: 1402071205 ISBN-13: 978-1402071201


Product Description
Frequency synthesizers are an essential building block of RF communication products. They can be found in traditional consumer products, in personal communication systems, and in optical communication equipment. Since frequency synthesizers are used in many different applications, different performance aspects may need to be considered in each case. The main body of the text describes a conceptual framework for analyzing the performance of PLL frequency synthesizers, and presents optimization procedures for the different performance aspects. The analysis of the PLL properties is performed with the use of the open-loop bandwidth and phase margin concepts, to enable the influence of higher-order poles to be taken into account from the beginning of the design process. The theoretical system analysis is complemented by descriptions of innovative system and building block architectures, by circuit implementations in bipolar and CMOS technologies, and by measurement results. Architectures for RF Frequency Synthesizers contains basic information for the beginner as well as in-depth knowledge for the experienced designer. It is widely illustrated with practical design examples used in industrial products.
Content

Introduction
1.1 Overview of the Book
References
Tuning System Specifications
Tuning Range
Minimum Step Size
Settling Time
Spurious Signals
Phase Noise Sidebands
Power Dissipation
Integration Level
Interference Generation
References
3 Single-Loop Architectures
Introduction
Integer-N PLL Architecture
PLL Building Blocks

3.3.1
3.3.2
3.3.3
3.3.4
Voltage-Controlled Oscillators
Frequency Dividers
Phase Detectors
The Phase-Frequency Detector/Charge-Pump Combination
Loop Filter
Dimensioning of the PLL Parameters
Open- and Closed-loop Transfer Functions
Open-loop Bandwidth and Phase Margin
Spectral Purity Performance
Spurious Reference Breakthrough
Phase Noise Performance
Design of the Loop Filter
Spurious Reference Breakthrough
Phase Noise Contribution from the Loop Filter Resistor
Dimensioning of Time Constant and Capacitance
The Choice of the Reference Frequency
Single loop PLL with Divided Oscillator Output
Fractional-N PLL Techniques
Phase Error Compensation
Modulation Techniques
Translation Loops
Direct Digital Frequency Synthesizers
Architectures Combining PLL and DDS Synthesizers
Summary of Conclusions on Single-Loop Architectures
References
4 Wide-Band Architectures
Introduction
Receiver Architectures
Residual Phase Deviation
The Residual Phase Deviation Power
The Open-Loop Bandwidth for Optimum Phase Noise
Performance
Minimum Approximated Residual Phase Deviation
Influence of the Phase Margin on the Residual Phase
Deviation
The Influence of the Open-Loop Bandwidth on the
Residual Phase Deviation
The Condition for the Implementation of the Optimum
Loop Bandwidth
Single-Loop Design
Specification of the PLL Building Blocks
Single-Loop Architectures
Wide-Band Loop Design
Multi-Loop Design
Phase Noise Performance
Specification of the Different Loops
The Limiting Values for the Reference Frequency
Satellite Tuning System
Double-loop Tuning System Architecture
Phase Noise Performance
Dividers in Bipolar Technology
Architecture
Logic Implementation of the Divider Cells
Circuit Implementation
Power Dissipation Optimization and Sensitivity Measurements
VHF PFD/CP Architectures
Architecture
Circuit Implementation
Measurement Results
Conclusions
References
5 Adaptive PLL Architecture
Introduction
RDS Car-Radio Application
Multi-Band Tuner Architecture
Settling Time
Settling Behaviour
Open-Loop Bandwidth, Phase Margin and Settling
Time Specifications
5.5 Settling Time Requirements
5.6 Residual Frequency Deviation
Introduction
Basic Concepts
Simplified Treatment of the Residual Frequency Deviation
of a PLL
Numerical Results with Analytic Transfer Functions .
Conclusions
Terrestrial FM Broadcasting
Reference Spurious Signals and Loop Filter Attenuation
Limitations of Existing PLL Architectures
Adaptive PLL Architecture
Basic Architecture
Loop Filter Implementation
Dead-Zone Implementation
Circuit Implementation
Programmable Dividers
Oscillators
Charge-Pumps
Measurements
Conclusions
References
6 Programmable Dividers
Introduction
Divider Architectures
Architecture Based on a Dual-Modulus Prescaler
Presettable Programmable Counters
Basic Programmable Prescaler
Adaptive Power Prescaler Architecture for Multi-Band
Applications
Prescaler with Extended Programmability
Dividers in CMOS Technology
Logic Implementation of the Divider Cells
Circuit Implementation of the Divider Cells
Power Dissipation Optimization
Input Amplifier
Input Sensitivity Measurements and Maximum Operation
Frequencies
Phase Noise Measurements
Conclusions
References
7 Conclusions
A PLL Stability Limits Due to the Discrete-Time PFD/CP Operation 237
A.1 Stability Limits
References
B Clock-Conversion PLLs for Optical Transmitters
References
Architectures for RF Frequency Synthesizers.Kluwer.part7
共7部分

ص

Architectures for RF Frequency Synthesizers.Kluwer.part4
共7部分
Architectures for RF Frequency Synthesizers.Kluwer.part3
共7部分
Architectures for RF Frequency Synthesizers.Kluwer.part1
共7部分
Architectures for RF Frequency Synthesizers.Kluwer.part2
共7部分
Architectures for RF Frequency Synthesizers.Kluwer.part6
共7部分
Architectures for RF Frequency Synthesizers.Kluwer.part5
共7部分
本帖最后由 huangfeihong88 于 2009-12-1 10:18 编辑

:11bb :11bb
很好的书,谢谢!
很好的书,谢谢, 很好的书,谢谢!!!
楼主最近分享了好多好书啊,支持加感谢!
本帖最后由 huangfeihong88 于 2009-12-1 10:18 编辑

:27bb
多谢搂住提供这么多好书~~~~~~~~~~~~~
本帖最后由 huangfeihong88 于 2009-12-1 10:19 编辑

:31bb :31bb
xuexi............................................
好厉害   这本书很难找到的,非常感谢
很好的书,谢谢, 很好的书,谢谢!!!
多谢搂住提供好书~~~~~~:11bb :27bb
温馨提示:
         微波技术网欢迎您!
         酣畅的下载源于无私的奉献
         详尽的资料全因你我的支持
         献出一点,举手之劳;鼓舞他人,获取更多!
         认真发贴提高自已,帮助别人! 从我做起!
好东西....
就想要关于PLL的资料
:11bb :11bb :11bb
:27bb :27bb :27bb :27bb
我正准备学呢! 好厉害   这本书很难找到的,非常感谢!!
:11bb

楼主货可真多,频率合成,谢谢
真的是非常好的资料啊,希望学习一下。
谢谢:qqm
學習學習multi -loop PLL是如何design, 謝謝樓主提供好資料!
温馨提示:
         微波技术网欢迎您!
         酣畅的下载源于无私的奉献
         详尽的资料全因你我的支持
         献出一点,举手之劳;鼓舞他人,获取更多!
         认真发贴提高自已,帮助别人! 从我做起!
谢谢!!!!!!!!!!!!!!!!!!
[g:12] 资料真多。不知道要看多久才能看完。还是看一点看一点呢?
太感谢楼主了,太需要这方面的书了:27bb :29bb :30bb :31bb
没读过,支持支持。
:30bb  楼主最近分享了好多好书啊,支持+感谢!
:30bb 谢谢楼主:11bb :11bb
谢谢了!:27bb :27bb
:31bb :31bb :31bb :31bb
这本书看上去还不错!新来的,顶一下!:29bb
thank you!!!!!!!!!!!!!!!!!!!!!!!!!!
感谢一个,坚决支持!!!
好人哪,好书,谢谢!
顶一下,谢谢分享!
这本书很难找到的,非常感谢!!!!!!!!!!!!
多谢搂主, 提供好书!
很好的书,谢谢, 很好的书,谢谢!!!
好厉害   这本书很难找到的,非常感谢
好书啊,谢谢分享
:27bb 3# drjiachen
本帖最后由 huangfeihong88 于 2009-12-1 10:21 编辑

:53bb:53bb
xiexiefengxiang
看看:18de
看看这个本书
多谢搂住提供好书~~~~~~
很好的书,谢谢!
好书,谢谢楼主
thx for sharing
回复谢谢!!!!!!!!!!!!!!!!!!1
好东西哦~~~呵呵~~~
书不错,感谢楼主
谢谢,楼主分享
这本书不错,暴强!!!
:crackle.GIF
谢谢楼主分享
感觉这本书写的应该不错 看前面的摘要来讲 实践性是很强的
楼主最近分享了好多好书啊,支持加感谢
我靠!这都找得到,牛!!!!
Architectures for RF Frequency Synthesizers part1
用的着下了看看
xie xie lou zhu
dddddddddddddddddddd
多谢搂住提供好书~~~~~~
下来看看,谢谢。
{:7_1257:} {:7_1234:} {:7_1257:}
谢谢楼主无私分享
Architectures for RF Frequency Synthesizers.Kluwer.part7
共7部分
谢谢哈。。。。多谢多谢。。。
楼主最近分享了好多好书啊,支持加感谢!
信息来源:微网-微波社区 http://www.mwtee.com/
原文地址:http://www.mwtee.com/thread-14564-1-1.html
回复 drjiachen 的帖子

回帖是一种美德,懂得感恩,才会收获更多
谢谢分享经典书籍。
谢谢分享,嘿嘿
谢谢慷慨的楼主
看似很不错
看似很不错
好资料
感谢感谢
好好好好好
很不错好好好好好好好好好
感謝分享!{:soso_e100:}
不错的资料。支持一下
不错 看看
高人,好书!!!
Thanks for sharing
非常好的
very good and thanks
谢谢分享
看看先,楼主好人
入股完工后如火如荼浩特
thank you for your help
客服中心 搜索
关于我们
关于我们
关注我们
联系我们
帮助中心
资讯中心
企业生态
社区论坛
服务支持
资源下载
售后服务
推广服务
关注我们
官方微博
官方空间
官方微信
返回顶部