Integrated Circuit Packaging, Assembly and Interconnections.[W J.Greig]: IC Packging.JPG

Integrated Circuit Packaging, Assembly and Interconnections (Springer Series in Advanced Microelectronics) (Hardcover)by William J. Greig (Author)


Hardcover: 300 pages Publisher: Springer; 1 edition (March 30, 2007) Language: English ISBN-10: 0387281533 ISBN-13: 978-0387281537


Product Description

Reviewing the various IC packaging, assembly, and interconnection technologies, this professional guide and reference provides an overview of the materials and the processes, as well as the trends and available options, that encompass electronic manufacturing. It covers both the technical issues and touches on some of the reliability concerns with the various technologies applicable to packaging and assembly of the IC.
The focus is on the electronic manufacturing process, which in its simplest form involves assembly of the IC into a package or interconnect substrate or board. The book discusses the various packaging approaches available, namely, single chip, multichip, and Chip On Board; the assembly options, chip & wire, tape automated bonding, and flip chip; and the essential high density package/substrate manufacturing technologies, thin film, thick film, cofired ceramic, and laminate printed wiring board (PWB) processes. Included also is a discussion of high density PWBs using build up/sequential processes.
Integrated Circuit Packaging, Assembly and Interconnections is an introduction, a review and an update of packaging technologies.

啥都没看见，是不是预告片？什么时候传上来啊？

Table of Contents

List of Figures ........................................................................................................ xiii
List of Tables...........................................................................................................xxi
Preface .................................................................................................................. xxiii
Acknowledgements ................................................................................................xxv
About the Author................................................................................................ xxvii
1 Electronic Manufacturing and the Integrated Circuit ............... 1
1 — MICROELECTRONICS AND THE TRANSISTOR................................1
1.1 — The Integrated Circuit and Moore’s Law (2-5) .......................................1
1.2 — Electronics Manufacturing and the Technology Drivers.........................3
1.3 — A Technology Driver—The Integrated Circuit .......................................8
1.4 — The International Roadmap for Semiconductors (ITRS) ......................10
2 Integrated Circuit Manufacturing: A Technology Resource... 15
2 — IC MANUFACTURING TECHNOLOGIES ...........................................15
2.1 — Overview of the IC Manufacturing Processes.......................................15
2.2 — The Manufacturing Environment ..........................................................17
2.3 — The Photolithographic Process..............................................................20
2.4 — IC Methodologies and Packaging, Assembly, Interconnections ...........28
3 Packaging the IC—Single Chip Packaging ............................... 31
3 — THE IC PACKAGE....................................................................................31
3.1 — Trends in IC Packaging.........................................................................32
3.2 — Area Array Packages—PGA, BGA ......................................................36
3.3 — BGA Surface Mount Assembly.............................................................41
3.4 — BGA Attributes .....................................................................................42
3.5 — BGA Concerns ......................................................................................42
3.6 — The Future .............................................................................................43
3.7 — Lead-Free Manufacturing......................................................................43
viii Integrated Circuit Packaging, Assembly and Interconnections
4 The Chip Scale Package .............................................................. 47
4 — THE CHIP SCALE PACKAGE, CSP ......................................................47
4.1 — Chip Scale Package Manufacturing Technologies ................................48
4.2 — The μBGATM.........................................................................................52
4.3 — Wafer Level Packaging—The WLP......................................................55
4.4 — Reliability Concerns .............................................................................57
4.5 — Summary ...............................................................................................58
5 Multichip Packaging.................................................................... 61
5 — MULTICHIP PACKAGING (MCP).........................................................61
5.1 — MCP Substrate/Package Technologies .................................................62
5.2 — The Hybrid Circuit ................................................................................62
5.3 — The Multichip Module (MCM).............................................................65
5.4 — 3-D Packaging.......................................................................................67
5.5 — 3-D Packaging and the Flex Circuit ......................................................71
5.6 — Die Stacking Using Silicon Thru-Vias..................................................75
5.7 — System in Package (SiP)/System on Package (SoP) .............................77
5.8 — Summary—Benefits of Multichip Packaging .......................................79
6 Known Good Die (KGD) ............................................................. 81
6 — THE KGD STORY .....................................................................................81
6.1 — The Semiconductor Assembly/Packaging/Test Process........................81
6.2 — The Bare Die Problem...........................................................................83
6.3 — Addressing the Bare Die Problem—Wafer Lot Acceptance Testing ....86
6.4 — Known Good Die (KGD) ......................................................................86
6.5 — Wafer Level Burn-in and Test (WLBT)................................................90
6.6 — Industry Responsiveness .......................................................................92
7 Packaging Options—Chip on Board.......................................... 93
7 — DIRECT CHIP ATTACH (DCA) AND CHIP ON BOARD (COB).......93
7.1 — The COB Process ..................................................................................94
7.2 — Flip Chip On Board (FCOB).................................................................98
7.3 — Summary .............................................................................................101
8 Chip & Wire Assembly.............................................................. 103
8 — CHIP & WIRE ASSEMBLY ..................................................................103
8.1 — Die/Wire Bonding and Bonder Equipment Development ...................103
8.2 — Impact of the IC on Bonding and Bonder Development .....................105
8.3 — The Chip and Wire Assembly Process ................................................105
viii
Table of Contents ix
8.4 — Bonding Wire: Au, Al, and Cu............................................................106
8.5 — Bonding Methods ................................................................................108
8.6 — Types of Bonds ...................................................................................110
8.7 — The Ball Bonding Process...................................................................110
8.8 — Wedge Bonding...................................................................................111
8.9 — Obstacles to Quality and Reliable Wire Bonding................................112
8.10 — Metallurgical Concerns and Surface Finishes ...................................114
8.11 — Handling and Storage........................................................................118
8.12 — Verifying Wire Bonding Quality.......................................................118
8.13 — Responding to the IC and End Product .............................................120
8.14 — Wire Bonding on Organic Substrates, The PBGA and PWB............125
8.15 — Summary ...........................................................................................127
9 Tape Automated Bonding—TAB............................................. 129
9 — BACKGROUND—MINIMOD................................................................129
9.1 —Tape Automated Bonding ....................................................................129
9.2 — The TAB Tape ....................................................................................129
9.3 — TAB Assembly....................................................................................134
9.4 — Reliability Concerns............................................................................138
9.5 — Areas of Applications..........................................................................139
9.6 — Summary .............................................................................................140
10 Flip Chip—The Bumping Processes...................................... 143
10 — BACKGROUND .....................................................................................143
10.1 — IBM’s Flip Chip Transistor ...............................................................143
10.2 — Wafer Bumping.................................................................................147
10.3 — Bump Deposition Processes ..............................................................150
10.4 — Comparing Flip Chip Solder Bumping Processes .............................160
10.5 — Polymer/Bumps.................................................................................161
10.6 — Stud/Ball Bumping............................................................................163
10.7 — Trends in Bumping Technology........................................................165
11 Flip Chip Assembly.................................................................. 169
11 — BASIC FLIP CHIP ASSEMBLY ..........................................................169
11.1 — Flip Chip Bonding Processes ............................................................170
11.2 — The Solder Reflow Process ...............................................................171
11.3 — Flip Chip Solder Joint Reliability......................................................173
11.4 — Reliability and Lead-Free Solders.....................................................182
11.5 — Solder Reflow Attach: Comments, Concerns....................................183
11.6 — Alternative Flip Chip Bonding Methods ...........................................183
11.7 — Adhesive Flip Chip Attachment ........................................................184
ix
x Integrated Circuit Packaging, Assembly and Interconnections
11.8 — Adhesive Bumps ...............................................................................188
11.9 — Summary: Advantages of Flip Chip as a First Level Interconnect....189
12 HDI Substrate Manufacturing Technologies: Thin Film
Technology................................................................................ 193
12 — HIGH DENSITY PACKAGE/SUBSTRATE MANUFACTURING
TECHNOLOGIES..................................................................................193
12.1 — Thin Film Technology.......................................................................193
12.2 — The Patterning Process......................................................................195
12.3 — Processing an HDI Substrate Interconnect .......................................200
12.4 — Thin Film Materials...........................................................................202
12.5 — Alternative Thin Film Processes for MCP Applications ...................212
12.6 — High Density Interconnects—Cost and Yield Considerations ..........218
13 HDI Substrate Manufacturing Technologies: Thick Film
Technology................................................................................ 221
13 — THICK FILM TECHNOLOGY............................................................221
13.1 — The Thick Film Process ....................................................................221
13.2 — The Patterning Process......................................................................222
13.3 — Thick Film Screen Printing and MCM-C/HDI..................................227
13.4 — Advanced Thick Film Patterning Processes ......................................229
14 HDI Substrate Manufacturing Technologies: Cofired
Ceramic..................................................................................... 233
14 — THE COFIRED CERAMIC TAPE TECHNOLOGY.........................233
14.1 — IBM’s Multilayer Interconnect (MLI) Packaging Program ..............234
14.2 — The Co-fired Ceramic Technology ...................................................236
14.3 — The Cofired Ceramic Tape Process...................................................237
14.4 — High Temperature Cofired Ceramic HTCC ......................................237
14.5 — Low Temperature Co-fired Ceramic LTCC......................................238
14.6 — Comparing Thick Film, HTCC and LTCC .......................................239
14.7 — Advanced LTCC Processes...............................................................241
14.8 — Summary Co-fired Ceramic Process Technologies...........................243
15 Substrate Manufacturing Technologies: Organic Packages
and Interconnect Substrate..................................................... 245
15 — THE LEVEL 2.0 PRINTED WIRING BOARD...................................245
15.1 — Overview of Conventional MLB Processing ...................................247
15.2 —The PBGA and the MCM-L...............................................................248
x
Table of Contents xi
15.3 — Impact of the IC on Packaging and Interconnect Technology ..........249
15.4 — Vias and HDI ....................................................................................251
15.5 — IBM’s SLC and HDI PWB Build Up Technology (BUT) ................253
15.6 — Current Status Microvia HDI PWBs.................................................256
15.7 — Enhancing HDI PWBs—Embedded Passives ..................................257
15.8 —Technology Status..............................................................................259
Acronymns and Definitions ..................................................................................261
Microelectronics Glossary.....................................................................................265
Index .......................................................................................................................289

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:好新的书啊  很好很强大 31bb

:11bb :11bb :11bb :11bb :
很好的书，谢谢！

谢谢！！！！！！！！！！！！！！！！！！

这方面的书找了很久，微波在IC中的典型应用:11bb

多谢，下载下来看看interconnected

多谢搂住，下来学习~~~~~~~~~~~~~~

好资料就收藏了，谢谢楼组这么辛苦的上传

:31bb :31bb :31bb :31bb

xuexi..........................................................

好书籍，谢谢分享！

:27bb :27bb :27bb

虽然次序有点乱，还是要谢谢！

好书，谢谢。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。

very very very nice~  @_@

dingdingdingding

。。。。。。。。。。。。。。。。。。。。。。。。。。。。

1、        TD-SCDMA系统的TA值问题
时间提前量（Timing Advance）
显示：TA
数据描述及定义：
时间提前量是UE根据某一下行时隙从接收信号中计算处的某一上行时隙的开始时间点。范围为0～63。TA可以表示UE与基站的距离。
1个码片表示的距离为：3 108/(1.28 2 106) = 117米。
63小了些。UE与基站的距离的最大距离为：117 m×63=7371 m
其实，和GSM 算法是一样的，只不过GSM的为3.7us×63×3×108m/s÷2=35km
因为每比特时长计算为：1/270Kbit/s=3.7us; 而TD是以码片计算时长的：1/1.28M/s=0.78125 us，少GSM 4.736倍

新书哦，2007年的，谢谢分享。

多谢楼主分析~~~~~~~~~~~~~~

好书好书:11bb :11bb :11bb

this is a good reference book

好多包。。。。。。。。。。。。。。。。。。。。。。。。。。。。。

hao  ................................

henaho  00000000

hao ..................

看到过纸质的书，现在有电子版的了，顶。

好书:22bb :22bb :22bb

:11bb :11bb 真是太棒了 一定要好好推西推

楼主的书很好！！谢谢分享！楼主的书很好！！谢谢分享！！！！！

搜寻好久，终于让我找到你了！

谢谢下载学习看看

:30bb :30bb :30bb :30bb

支持楼主！E

是本好书，多谢分享哦！
的确是好资料！

Thank you very much!!!

It is really good!! Thanks again!

好多~樓主辛苦了 是本好書!!:11bb

Thanks for sharing !!!

非常感谢，下载学习！

thanks....................

多谢，下载下来看看

又是这么多，不过为知识:22bb

感谢楼主！

好东东……感谢楼主

谢谢

谢谢楼主，辛苦

谢谢楼主分享！！

thank you very much

多谢楼主。

ernest0512

这本书很有收藏价值

这本书,还可以!!!!谢谢了

xie xie ......

谢谢分享！！！！！！！！！！！！

有参考价值

thanks very much

回复 drjiachen 的帖子

谢谢分享资料了

Good stuff!

看看,呵呵...

好书啊，我也正在找呢

{:7_1234:}

thank you

谢谢楼主分享好书。

好书好书好书好书好书好书

千呼万唤始出来

我也來下載看看
感謝樓主分享

好书啊，好书啊

谢谢楼主分享啦~~~

楼主这么剽悍，这么多好书

{:7_1234:}{:7_1234:}{:7_1234:}{:7_1234:}{:7_1234:}

thanks

谢谢啊。

thanks for sharing

very good and thanks

thx for share

thx for share

kankan

kankan

热的个人和热合热合体盒体